1. Field of the Invention
This invention relates to a transmitting method, a receiving method, a communication method, and a bi-directional bus system, which are used in a system in which devices, e.g., a television image receiver or a video tape recorder, etc. are connected to each other by using a bi-directional bus so that one of the devices can control other devices or sub-devices, e.g., a monitor image receiver, a TV tuner, or a video deck, etc. included in the other devices, or can display the operating states, etc. the other devices on the television image receiver.
2. Description of the Related Art
In recent years, there have been popularly used systems in which a plurality of audio equipments or visual equipments (hereinafter referred to as AV equipments) are with each other by means of video signal lines or audio signal lines (hereinafter referred to as AV signal lines) so that they are used as an AV system.
In such AV systems, equipments are connected by means of a system control bus (hereinafter simply referred to as a bi-directional bus) in addition to the above-described AV signal lines to control respective equipments. In a practical sense, Audio, Video and audiovisual systems Domestic Digital Bus (hereinafter referred to as D2B) standardized by the so-called publication 1030 of IEC, a Home Bus System (hereinafter referred to as HBS) standardized by the ET-2101 of EIAJ, and the like are known. Through the bi-directional bus, other devices are controlled from other equipments (devices), e.g., a television image receiver, a video tape recorder, and a video deck player (hereinafter respectively referred to as TV, VTR, VDP), etc., or sub-devices, e.g., a monitor image receiver (TV monitor), a TV tuner, a video deck, or an amplifier, etc. included in the devices are controlled from the other devices. Further, through the bi-directional bus, data for displaying, on a TV monitor, e.g., the operating state (status) of device or sub-device is transmitted. In addition, as an access system of the bi-directional bus, so called CSMA/CD (Carrier Sense Multiple Access with Collision Detection) is employed in, e.g., D2B.
Namely, four types of communication are carried out through the bi-directional bus communication from a sub-device included in a device to a sub-device included in any other device (hereinafter referred to as communication from sub-device to sub-device), communication from a sub-device included in a device to any other device (hereinafter referred to communication from sub-device to device), communication from a device to a sub-device included in any other device (hereinafter communication from device to sub-device), and communication from a device to any other device
The format of a transmit signal used in a bi-directional bus as described above, e.g., D2B will now be described. In D2B, control commands for controlling a sub-device of destination, etc. or data indicating the operating state, etc. are caused to have a frame configuration as shown in FIG. 1, and are transmitted through the bi-directional bus.
Namely, one frame of the data consists of a header field 101 for specifying a header indicating a leading portion of the frame, a master address field 102 for specifying a master device address, a slave address field 103 for specifying a slave (receiving side) device address, a control field 104 for specifying control bits indicating whether communication is made while the slave device is locked, or is unlocked, and a data field 105 for specifying control commands or data.
The header of the header field 101 consists of, as shown in FIG. 2, a start bit 101a of one bit for providing synchronization, and mode bits 101b for prescribing a transmission speed (rate) or the number of bytes of the data field 105. These mode bits 101b are 1.about.3 bits. At present, there are three standardized modes of mode 0 where the data field 105 is comprised of 2 bytes at the maximum, mode 1 where the data field 105 is comprised of 32 bytes at the maximum (16 bytes at the maximum in the case of communication from slave to master), and mode 2 where the data field 105 is comprised of 128 bytes at the maximum (64 bytes at the maximum in the case of communication from slave to master).
The master device address of the master address field 102 consists of, as shown in the above-mentioned FIG. 2, master address bits 102a of 12 bits for specifying a master device address, and a parity bit 102b of 1 bit.
The slave device address of the slave address field 103 consists of, as shown in the above-mentioned FIG. 2, a slave address bits 103a of 12 bits for specifying a slave device address, a parity bit 103b of 1 bit, and an acknowledge bit 103c of 1 bit acknowledging the receipt of data from a slave device.
As shown in the above-mentioned FIG. 2, control bits 104a of 4 bits indicating the communication direction of control commands or data, or indicating lock state or unlock state, a parity bit 104b of 1 bit, and an acknowledge bit 104c of 1 bit are assigned to the control field 104.
In the data field 105, as shown in the above-mentioned FIG. 2, data bits 105a of 8 bits, end of data bit 105b of 1 bit, parity bit 105c of 1 bit, and acknowledge bit 105d of 1 bit are repeated as many as necessary. Assuming now that data bits 105a include data #1, #2, #3, . . . in this order from the beginning, in communication of, e.g., control commands, e.g., Operation code (hereinafter referred to as OPC) "Begin 2" (i.e., code "BD"h (h represents hexadecimal number)) indicating communication relating to sub-device, OPC "Begin 1" ("BC"h) indicating communication through HBS, and OPC "Begin 0" ("BB"h) indicating communication through other bus, etc. are all assigned (allocated) to data #1. Further, e.g., for communication of data, data are assigned to data #1, #2 #3 . . . each having a byte (8 bits).
OPR with respect to the above-described OPCs, e.g., OPR with respect to OPC "begin 2" consists of, as shown in FIG. 3, bits b5, b4, b3, b2 (b7 is the Most Significant Bit (MSB) for identifying service codes of the Communication Telephony (CT) system, the Audio Video and Control (AV/C) system, and the Housekeeping (HK) system, etc., and bits b1, b0 indicating any one of communication from sub-device to sub-device, communication from sub-device to device, communication from device to sub-device, and communication from device to device, viz., indicating presence or absence of Source Sub-Device Address (hereinafter referred to as SSDA) or Destination Sub-Device Address (hereinafter referred to as DSDA). It is to be noted that bit b7 is caused to be always zero, and bit b6 is reserved for future standardization and is caused to be 1 at present. In more practical sense, b1=0, b0=0 indicates communication from sub-device to sub-device; b1=0, b0=1 indicates communication from sub-device to device; b1=1, b0=0 indicates communication from device to sub-device; and b1=1, b0=1 indicates communication from device to device.
For transmitting data having a data quantity greater than a data capacity of the data field 105 in unlock state from VTR to TV, the data is divided into 2 frames, for example, VTR constitutes, as shown in FIG. 4, two frames (so called a packet) P1, P2 in which master address bits are an address of VTR, slave address bits are caused to be an address of TV, control bits are a code (e.g., "F"h) indicating writing data in unlock state, and data are assigned to data #1, #2, #3 . . . . Then, VTR detects presence or absence of so called a carrier on the bi-directional and VTR transmits frame P1 when there is no carrier, i.e., the bi-directional bus is open. After sending frame P1 VTR stops sending of carrier to open the bi-directional bus. When the bi-directional bus is open for a second time, VTR transmits frame P2. Thus, transmission of data from VTR to TV is completed. TV carries out display of characters based on this data transmitted from VTR.
Suppose that VDP waits until the bi-directional bus is opened for transmitting data to TV while VTR is transmitting frame P1, as shown in the above-mentioned FIG. 4. When VTR completes transmission of frame P1 thereafter to stop sending of carrier, VDP detects that there is no carrier on the bi-directional bus and acquires the right of use of the bi-directional bus to transmit, to TV, a frame P3 in which master address bits, slave address bits, and control bits are respectively a VDP address, a TV and code "F"h (data/unlock), and data are assigned to data #1, #2, #3 . . . . When transmitting operation of VDP is completed, VTR transmits frame P2. Namely, since VTR does not place TV in lock state, frame P1 from VTR, frame P3 from VDP and frame P2 from VTR are received this order by TV. Since master address bits for identifying a master device are added to these frames, there is no possibility of error in transmission, i.e., no message data from VTR and VDP may be mixed. However, when data for display is sent from VDP to TV for a time period during which VTR also sends data to TV to display status of VTR on the screen of TV, there is the possibility that there may take place an inconvenience such that display of VDP breaks into display of VTR or a TV screen, or it takes much time in display of character, etc.
In view of this, in the conventional bi-directional bus system, as shown in FIG. 5, a master device allows a slave (receiving side) device to be placed in lock state to carry out transmission of data. Namely, e.g., VTR transmits a frame P1 in which master address bits are an address of VTR, slave address bits are an address of TV, control bits are code "A"h indicating write of control command in lock state. OPC "Begin 2", code "54"h indicating presence of SSDA and DSDA, address of, e.g., video deck, address of, e.g., TV monitor code, code "EO"h indicating display, "20"h indicating, e.g., the first line on screen, code "22"h indicating, e.g., letter (character) of the standard size, and code "21"h indicating, e.g., a use of lower case character of the alphabet are respectively assigned to data #1 (OPC), data #2 (OPR), data #3 (SSDA), data #4 (DSDA), data #5 (OPC), data #6 (OPR1), data #7 (OPR2), and data #8 (OPR3), thus to carry out control to lock TV. It is to be noted that SSDA and DSDA are assigned if necessary. For example, for communication from sub-device to device, DSDA is unnecessary. For communication from device to sub-device, SSDA is unnecessary. For communication from device to device, SSDA and DSDA are unnecessary.
Then, VTR transmits a frame P2 in which master address bits, slave address bits, and control bits are respectively an address of VTR, address of TV, and code "B"h indicating write of data in lock state, and data of, e.g., 32 bytes at the maximum are assigned to data #1, #2, #3 . . . . This operation is continued until a line displayed is changed.
Then, in order to give an instruction of line change, VTR transmits a frame Pi in which master address bits, slave address bits, and control bits are respectively an address of VTR, an address of TV and code "A"h (command/lock), and code "EO"h, code "21"h indicating, e.g., second line on the screen, code "21"h indicating, a use of large letter (character), and code "20"h indicating, a use of capital of alphabet are respectively assigned to data #1 (OPC), data #2 (OPR1), data #3 (OPR2) and data #4 (OPR3). Then, VTR transmits a frame Pi+1 in which master address bits, slave address bits and control bits are respectively an address of VTR, an address of TV and code "B"h (data/lock), and the remaining data are assigned to data #1, #2, #3 . . . .
Thereafter, VTR transmits a frame Pi+2 in which master address hits, slave address hits and control hits are an address of VTR, an address of VTR, address of TV and code "E"h indicating write of control command in unlock state, respectively. End command (code "BE"h) indicating that message (data communication) has been completed is assigned to data #1 (OPC) to release lock of TV.
When VTR completes transmission of frame P2 to stop sending of carrier VDP acquires the right of use of the bi-directional bus. VDP transmits data to TV to transmit a frame Pj in which master address hits, slave address hits and control hits are respectively an address of VDP, an address of TV and code "A"h (command/lock). and OPC "Begin 2", code "54"h, address of, e.g., video player, address of, e.g., TV monitor, code "EO"h, code "20" (first line), code "22"h (standard letter (character)), and code "21"h (small letter (character) of alphabet) are respectively assigned to data #1 (OPC), data #2 (OPR), data #3 (SSDA), data #4 (DSDA), data #5 (OPC), data #6 (OPR1), data #7 (OPR2) and data #8 (OPR3), TV informs VDP that it is locked by VTR. Thus, VDP stops transmission of data. As a result, transmission of data from VTR to TV is continued without being interrupted by VDP.
When transmission of data from VTR to TV is completed, as shown in the above-mentioned FIG. 5, VDP transmits frame Pj to TV for a second time to place TV in lock state. Then, VDP transmits frame Pj+1 in which master address bits, slave address bits and control bits are respectively an address of VDP, an address of TV and code "B"h (data/lock), and data are assigned to data #1, #2, #3 . . . . Then, VDP transmits a frame Pj+2 in which master address bits, slave address bits and control bits are an address of VDP, an respectively address of VDP, address of TV and code "E"h (command/non-lock) and code "BE"h (end command) is assigned to data #1 (OPC) to unlock TV.
Thus, data transmission from VTR to TV and data transmission from VDP to TV are completed. In accordance with such a transmission procedure, the conventional bi-directional bus system solves the above-described problem that display of VDP breaks into display of VTR on a TV screen.
However, even when a data quantity of data to be transmitted is less than data capacity of data field 105, and data can be transmitted in a single frame, the conventional bi-directional bus system places a slave (receiving side) device in lock state, and unlock the slave device when transmission of data is completed.
Namely, as shown in FIG. 6, VTR transmits a frame P1 in which master address bits, slave address bits and control bits are respectively an address of VTR, an address of TV and code "A"h (command/lock), and OPC "Begin 2", code "54"h, address of video deck, address of TV monitor, code "EO"h, code "20"h, code "22"h and code "21"h are respectively assigned to data #1 (OPC), data #2 (OPR), data #3 (SSDA), data #4 (DSDA), data #5 (OPC), data #6 (OPR1), data #7 (OPR2), and data #8 (OPR3) so that TV is placed in lock state.
Then, VTR transmits a frame P2 in which master address bits, slave address bits, and control bits are respectively an address of VTR, an address of TV and code "B"h (data/lock), and data are assigned to data #1, #2, #3 . . . .
Thereafter, VTR transmits a frame P3 in which master address bits, slave address bits and control bits are respectively an address of VTR, an address of TV and code "E"h (command/lock), and code "BE"h (end command) indicating that message is completed is assigned to data #1 (OPC) to unlock TV.
As stated above, in the conventional communication method or bi-directional bus system, before actual data is transmitted, a frame for allowing a device on the receiving side to be placed in lock state is required, and another frame is necessary for allowing the device on the receiving side to be placed in unlock state at the time when transmission of data is completed, resulting in the problems that a data traffic quantity is increased, the transmission efficiency is low, and the communication procedure (protocol) is complex, etc.